Oscillator wafer-level-package structure
US11545935B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2021 |
| Grant date | Jan 3, 2023 |
| Priority date | — |
| Expiry date | May 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N30/88
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An oscillator wafer-level-package structure is provided, comprising a bottom layer, an oscillator crystal and a capping layer. The bottom layer includes an upper plane, the capping layer includes a lower plane, and the oscillator crystal is disposed between the bottom layer and the capping layer and includes at least one cavity. An upper seal ring and a lower seal ring are respectively surrounding the oscillator crystal such that the oscillator crystal is sealed in between the capping layer and the bottom layer by employing the upper and lower seal rings. In addition, a diffusion barrier is further disposed in the upper seal ring and in the lower seal ring for avoiding interface diffusion. Moreover, the present invention adopts the same material for fabricating the capping layer, the oscillator crystal and the bottom layer to achieve an optimal thermal stress result when realizing the packaging structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.