High speed flipflop circuit
US11545964B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2020 |
| Grant date | Jan 3, 2023 |
| Priority date | — |
| Expiry date | Mar 25, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356121
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
High-speed flipflop circuits are disclosed. The flipflop circuit may latch a data input signal or a scan input signal using a first signal, a second signal, a third signal, and a fourth signal generated inside the flipflop circuit, and may output an output signal and an inverted output signal. The flipflop circuit includes a first signal generation circuit configured to generate the first signal; a second signal generation circuit configured to generate the second signal; a third signal generation circuit configured to receive the second signal and generate the third signal; and an output circuit configured to receive the clock signal and the second signal, and output an output signal and an inverted output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.