Analog-to-digital converter with auto-zeroing residue amplification circuit
US11545991B2 · kind B2 · utility
1Cited by
6References
20Claims
0Family size
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Key dates
| Filing date | Nov 11, 2021 |
| Grant date | Jan 3, 2023 |
| Priority date | — |
| Expiry date | Nov 11, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/466
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.