Patent · US Active

Low-noise, high-accuracy single-ended input stage for continuous-time sigma delta (CTSD) analog-to-digital converter (ADC)

US11545996B1 · kind B1 · utility

2Cited by
8References
20Claims
0Family size

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Key dates

Filing dateAug 24, 2021
Grant dateJan 3, 2023
Priority date
Expiry dateAug 24, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/742
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Systems, devices, and methods related to low-noise, high-accuracy single-ended continuous-time sigma-delta (CTSD) analog-to-digital converter (ADC) are provided. An example single-ended CTSD ADC includes a pair of input nodes to receive a single-ended input signal and input circuitry. The input circuitry includes a pair of switches, each coupled to one of the pair of input nodes; and an amplifier to provide a common mode signal at a pair of first nodes, each before one of the pair of switches. The single-ended CTSD ADC further includes digital-to-analog converter (DAC) circuitry; and integrator circuitry coupled to the input circuitry and the DAC circuitry via a pair of second nodes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.