Patent · US Active

Standardized interface for intellectual property blocks

US11550917B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Aditya Katragada · Austin, US
Prashant Dewan · Hillsboro, US
Karunakara Kotary · Portland, US
Vinupama Godavarthi · Folsom, US
Kumar N. Dwarakanath · Folsom, US
Alex Izbinsky · Maoz Ziyyon, IL
Purushottam Goel · Portland, US

Key dates

Filing date	Jun 28, 2019
Grant date	Jan 10, 2023
Priority date	—
Expiry date	Nov 22, 2040

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

There is disclosed in one example, a system-on-a-chip (SoC), including: a processor core; a fabric; an intellectual property (IP) block communicatively coupled to the processor core via the fabric, the IP block having a microcontroller configured to provide a microcontroller architecture; a firmware load interface configured to provide a standardized hardware interface to the microcontroller architecture, wherein the standardized hardware interface provides an architecture-agnostic mechanism to securely load a firmware to the intellectual property block; and logic to provide a loader to load a firmware to the IP block via the firmware load interface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.