Methods and systems for analog circuit analysis
US11550984B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2020 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | Oct 16, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for analyzing an analog circuit controlled by a plurality of digital inputs is presented. The circuit is represented with a data structure with nodes connected via edges, which represent a circuit component. The data structure can be traversed across all connected nodes; and said digital inputs can be toggled between two or more input states. The method steps include identifying a set of boundary nodes in the data structure which are at a digital-analog boundary of the data structure; for each digital input, identifying associated boundary nodes which are coupled with the digital input; grouping digital inputs into input sets, where each of the different input sets are associated with mutually exclusive sets of associated boundary nodes, and analyzing the circuit by successively analyzing one or more of the input sets for all possible combinations of inputs states within that set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.