Clock synchronization method and apparatus
US11552721B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2021 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | Aug 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J2203/0085
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A clock synchronization method includes receiving, by a receiving apparatus, a plurality of data blocks using a plurality of physical layer modules (PHYs), where the plurality of data blocks include a plurality of head data blocks, performing, by the receiving apparatus, timestamp sampling on the plurality of data blocks to generate a plurality of receipt timestamps, aligning, by the receiving apparatus, the plurality of receipt timestamps using a first receipt timestamp as a reference, generating, by the receiving apparatus, a clock synchronization packet based on the plurality of data blocks, and writing, by the receiving apparatus, a value of a second receipt timestamp into the clock synchronization packet, where the second receipt timestamp is a receipt timestamp that is of a second data block and that is determined based on the plurality of aligned receipt timestamps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.