Securing system-on-chip (SoC) using incremental cryptography
US11552782B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2020 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | Sep 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/0485
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various examples are provided related to software and hardware architectures that enable a lightweight incremental encryption scheme that is implemented on a System-on-chip (SoC) resource such as a network interface. In one example, among others, a method for incremental encryption includes obtaining, by a network interface (NI) of a sender intellectual property (IP) core in a network-on-chip (NoC) based system-on-chip (SoC) architecture, a payload for communication to a receiver intellectual property (IP) core; identifying, by the NI, one or more different blocks between the payload and a payload of a previous packet communicated between the sender IP core and the receiver IP core; and encrypting, by the NI, the one or more different blocks to create encrypted blocks of an encrypted payload.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.