Receive-side timestamp accuracy
US11552871B2 · kind B2 · utility
1Cited by
54References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2020 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | Dec 11, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2463/121
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a network device, includes a network interface port configured to receive data symbols from a network node over a packet data network, at least some of the symbols being included in data packets, and controller circuitry including physical layer (PHY) circuitry, which includes receive PHY pipeline circuitry configured to process the received data symbols, and a counter configured to maintain a counter value indicative of a number of the data symbols in the receive PHY pipeline circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.