Method for forming an electrical connection between an electronic chip and a carrier substrate and electronic device
US11557566B2 · kind B2 · utility
0Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2020 |
| Grant date | Jan 17, 2023 |
| Priority date | — |
| Expiry date | Jun 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.