Accelerating constrained, flexible, and optimizable rule look-ups in hardware
US11561607B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2020 |
| Grant date | Jan 24, 2023 |
| Priority date | — |
| Expiry date | Mar 2, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Encoding of domain logic rules in an analog content addressable memory (aCAM) is disclosed. By encoding domain logic in an aCAM, rapid and flexible search capabilities are enabled, including the capability to search ranges of analog values, fuzzy match capabilities, and optimized parameter search capabilities. This is achieved with low latency by using only a small number of clock cycles at low power. A domain logic ruleset may be represented using various data structures such as decision trees, directed graphs, or the like. These representations can be converted to a table of values, where each table column can be directly mapped to a corresponding row of the aCAM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.