Chip-carrier socket for microfluidic-cooled three-dimensional electronic/photonic integrated circuits
US11562942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2017 |
| Grant date | Jan 24, 2023 |
| Priority date | — |
| Expiry date | Jan 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/16145
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A chip carrier socket for an electronic-photonic integrated-circuit (EPIC) assembly comprises a carrier bottom and a carrier top configured to mate to the carrier bottom while enclosing the EPIC assembly within an enclosed cavity. The carrier bottom comprises one or more conductive vias passing from a first surface of the carrier bottom to an opposite second surface of the carrier bottom, each conductive via providing electrical connectivity between an electrically conductive pad on the first surface of the carrier bottom and a respective electrically conductive pad, solder ball, or electrically conductive spring on the second surface of the carrier bottom. One or both of the carrier bottom and the carrier top comprises a fluid inlet port and a fluid outlet port. Further, either or both of the carrier bottom and the bottom top comprises an optical via passing from one surface to another of the carrier bottom or carrier top.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.