Three-dimensional semiconductor device with a bit line perpendicular to a substrate
US11563005B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2020 |
| Grant date | Jan 24, 2023 |
| Priority date | — |
| Expiry date | Apr 1, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A three-dimensional semiconductor device includes a first channel pattern on and spaced apart from a substrate, the first channel pattern having a first end and a second end that are spaced apart from each other in a first direction parallel to a top surface of the substrate, and a first sidewall and a second sidewall connecting between the first end and the second end, the first and second sidewalls being spaced apart from each other in a second direction parallel to the top surface of the substrate, the second direction intersecting the first direction, a bit line in contact with the first end of the first channel pattern, the bit line extending in a third direction perpendicular to the top surface of the substrate, and a first gate electrode adjacent to the first sidewall of the first channel pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.