Thin film transistor and method for manufacturing the same, array substrate, display panel, and display device
US11563100B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 25, 2020 |
| Grant date | Jan 24, 2023 |
| Priority date | — |
| Expiry date | May 25, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure provide a thin film transistor, a method for manufacturing a thin film transistor, an array substrate, a display panel, and a display device. The thin film transistor includes: a base substrate; an active layer, an insulating layer, and a source-drain layer sequentially stacked on the base substrate, wherein the source-drain layer is electrically connected to the active layer through a via hole penetrating the insulating layer; and a transition layer arranged between the source-drain layer and the active layer at a position of the via hole, wherein the transition layer covers a bottom of the via hole and covers at least part of a sidewall of the via hole, and the transition layer comprises elements of the active layer and elements of a part of the source-drain layer, the part of the source-drain layer being in contact with the transition layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.