Integrated circuit with embedded testing circuitry
US11567121B2 · kind B2 · utility
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4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 2020 |
| Grant date | Jan 31, 2023 |
| Priority date | — |
| Expiry date | Jul 25, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2884
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit, comprising a plurality of pins, including a signal output pin. The integrated circuit also comprises a plurality of signal nodes. Each node in the plurality of signal nodes is operable to store a respective internal data signal. The integrated circuit also comprises a plurality of testing circuits. Each testing circuit in the plurality of testing circuits configured to sample a respective internal data state and in response to concurrently couple a unique output signal to a same pin in the plurality of pins, other than the signal output pin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.