Method and apparatus for front end gather/scatter memory coalescing
US11567767B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 30, 2020 |
| Grant date | Jan 31, 2023 |
| Priority date | — |
| Expiry date | Dec 6, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for processing gather and scatter instructions can implement a front-end subsystem, a back-end subsystem, or both. The front-end subsystem includes a prediction unit configured to determine a predicted quantity of coalesced memory access operations required by an instruction. A decode unit converts the instruction into a plurality of access operations based on the predicted quantity, and transmits the plurality of access operations and an indication of the predicted quantity to an issue queue. The back-end subsystem includes a load-store unit that receives a plurality of access operations corresponding to an instruction, determines a subset of the plurality of access operations that can be coalesced, and forms a coalesced memory access operation from the subset. A queue stores multiple memory addresses for a given load-store entry to provide for execution of coalesced memory accesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.