Patent · US Active

Array substrate, manufacturing method thereof, display panel and display device

US11569307B2 · kind B2 · utility

0Cited by
2References
19Claims
0Family size

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Key dates

Filing dateApr 22, 2020
Grant dateJan 31, 2023
Priority date
Expiry dateFeb 20, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10K59/1201

Abstract

An array substrate is provided, including a base substrate, a semiconductor active layer, a gate electrode, a source electrode, and a drain electrode that are sequentially provided, and further including a first insulating layer, a second insulating layer, a third insulating layer, at least one first via, and at least one second via. Each first via penetrates through the third insulating layer, and in each pixel unit with plural chromatic color resists, each first via is between adjacent two chromatic color resists and filled by one of the adjacent two chromatic color resists. Each second via penetrates through the second insulating layer, the at least one second via is in one-to-one correspondence with the at least one first via, each second via is filled by a chromatic color resist having a same color as that of the chromatic color resist in the corresponding first via.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.