Array substrate and display device
US11569330B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 24, 2020 |
| Grant date | Jan 31, 2023 |
| Priority date | — |
| Expiry date | Jan 7, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate is provided, including: a base substrate including a display area; a racetrack hole portion in the display area, including: a long axis; a short axis; a first hole and a second hole; a frame area surrounding the first hole and the second hole; and multiple lines in the frame area. The frame area includes a first wiring area and a second wiring area, the first wiring area includes a first conductive layer, and the multiple lines located in the first wiring area are arranged in the first conductive layer; and the second wiring area includes a second conductive layer and a third conductive layer arranged in different layers, and some of the multiple lines located in the second wiring area are arranged in the second conductive layer, and other lines of the multiple lines located in the second wiring area are arranged in the third conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.