Power semiconductor device and power semiconductor chip
US11569360B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 13, 2021 |
| Grant date | Jan 31, 2023 |
| Priority date | — |
| Expiry date | May 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
A power semiconductor device includes a semiconductor layer, a ladder-shaped trench recessed a specific depth from a surface of the semiconductor layer into the semiconductor layer and including a pair of lines having a first depth and a plurality of connectors connected between the pair of lines and having a second depth shallower than the first depth, a well region defined in the semiconductor layer between the pair of lines and between the plurality of connectors of the trench, a floating region defined in the semiconductor layer outside the pair of lines of the trench, a gate insulating layer disposed on an inner wall of the trench, and a gate electrode layer disposed on the gate insulating layer to fill the trench and including a first portion in which the pair of lines is filled and a second portion in which the plurality of connectors is filled. A depth of the second portion of the gate electrode layer is shallower than a depth of the first portion of the gate electrode layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.