Digital filter circuit and signal processing method
US11570025B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Apr 29, 2021 |
| Grant date | Jan 31, 2023 |
| Priority date | — |
| Expiry date | Apr 29, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/03834
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital filter circuit is described. The digital filter circuit includes at least one signal input and at least one finite impulse response (FIR) filter associated with the at least one signal input. The at least one signal input is configured to receive an input signal, wherein the input signal includes a product of at least two input signal samples. The at least one FIR filter is established as a short-length FIR filter. Further, a signal processing method is described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.