Transmitting data between regions of varying safety integrity levels in a system on a chip

US11573856B1 · kind B1 · utility

Assignee

• NVIDIA Corporation · US

Inventors

• Michael Alan Ditty · Los Gatos, US
• Hari U. Krishnan · San Carlos, US
• Padam Patt Krishnani · Kanchinakote, IN
• Jyotirmaya Swain · Kanchinakote, IN
• Anirban Ghosh · Bengaluru, IN
• Shraddha Manohar Gondkar · San Jose, US
• Avinash J V · Kanchinakote, IN
• Phanikumar Parvatham · Hyderabad, IN

Key dates

• Filing date: Sep 16, 2021
• Grant date: Feb 7, 2023
• Expiry date: Sep 16, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03M13/613
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

In various examples, a system includes a memory operating within a first risk level and circuitry operating within a second risk level that indicates more risk than the first risk level. The circuitry reads and/or writes data to a first memory address within the memory, and reads and/or writes an error detection code to a second memory address within the memory.