Patent · US Active

Circuits and methods for capacitor modulation

US11574660B2 · kind B2 · utility

0Cited by

4References

11Claims

0Family size

Assignee

Arm Limited · GB

Inventors

Lalit Gupta · Kanchinakote, IN
Nimish Sharma · Jalandhar, IN
Hetansh Pareshbhai Shah · Ahmedabad, IN
Bo Zheng · Sunnyvale, US

Key dates

Filing date	Aug 11, 2020
Grant date	Feb 7, 2023
Priority date	—
Expiry date	Sep 18, 2040

Classification

Technology area (CPC G)Physics
CPC primaryG11C16/26
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In a particular implementation, a circuit comprises: a memory array including a plurality of bit cells, where each of the bit cells are coupled to a respective bit path; a first multiplexer comprising a plurality of column address locations, where each of the plurality of column address locations is coupled to the memory array and corresponds to a respective bit path capacitance; and a variable capacitance circuit coupled to a reference path and configured to substantially match reference path capacitance to each of the respective bit path capacitances.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.