Semiconductor device sub-assembly
US11574894B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Jul 11, 2018 |
| Grant date | Feb 7, 2023 |
| Priority date | — |
| Expiry date | Oct 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13055
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
We disclose herein a semiconductor device sub-assembly comprising a plurality of semiconductor units of a first type, a plurality of semiconductor units of a second type; a plurality of conductive blocks operatively coupled with the plurality of semiconductor units, a conductive malleable layer operatively coupled with the plurality of conductive blocks, wherein the plurality of conductive blocks are located between the conductive malleable layer and the plurality of semiconductor units. In use, at least some of the plurality of conductive blocks are configured to apply a pressure on the conductive malleable layer, when a predetermined pressure is applied to the semiconductor device sub-assembly. At least one semiconductor unit of a second type is configured to withstand an applied pressure greater than a threshold pressure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.