Array substrate and display panel
US11579670B2 · kind B2 · utility
0Cited by
0References
20Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jun 8, 2020 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Jun 8, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/549
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to the field of display technology, and provides an array substrate and a display panel. The array substrate is provided with a via hole and further includes an annular wiring area. The annular wiring area is located around the via hole and is provided with an incision extending toward an outer edge of the annular wiring area along an inner edge of the annular wiring area, and at least a portion of the annular wiring area is bent toward a side away from a display side along the inner edge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.