Device profiling in GPU accelerators by using host-device coordination
US11579852B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 27, 2020 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Jul 27, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/44547
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
System and method of compiling a program having a mixture of host code and device code to enable Profile Guided Optimization (PGO) for device code execution. An exemplary integrated compiler can compile source code programmed to be executed by a host processor (e.g., CPU) and a co-processor (e.g., a GPU) concurrently. The compilation can generate an instrumented executable code which includes: profile instrumentation counters for the device functions; and instructions for the host processor to allocate and initialize device memory for the counters and to retrieve collected profile information from the device memory to generate instrumentation output. The output is fed back to the compiler for compiling the source code a second time to generate optimized executable code for the device functions defined in the source code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.