Computing chip, hashrate board and data processing apparatus
US11579875B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2021 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Jun 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to a computing chip, a hashrate board, and a data processing apparatus. The computing chip includes a plurality of operation stages arranged in a pipeline configuration. Each operation stage includes: a first combinational logic circuit occupying a plurality of first cell points adjacent to each other, at least a portion of the first cell points being located in a first incomplete column; one or more second combinational logic circuits each occupying one or more second cell points, at least a portion of the second cell points being located in a second incomplete column; and a plurality of registers each occupying a plurality of third cell points, at least a portion of the third cell points being located in the first incomplete column or the second incomplete column. The first cell points, the second cell points, and third cell points occupy equal areas on the computing chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.