Fine-grained stack protection using cryptographic computing
US11580035B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2020 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Dec 26, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a register to store an encoded pointer to a variable in stack memory. The encoded pointer includes an encrypted portion and a fixed plaintext portion of a memory address corresponding to the variable. The processor further includes circuitry to, in response to a memory access request for associated with the variable, decrypt the encrypted portion of the encoded pointer to obtain first upper address bits of the memory address and a memory allocation size for a variable, decode the encoded pointer to obtain the memory address, verify the memory address is valid based, at least in part on the memory allocation size, and in response to determining that the memory address is valid, allow the memory access request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.