Tracking temperature compensation of an x/y stress independent resistor
US11581309B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2022 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Feb 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/47
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit comprises a semiconductor substrate having a surface. A lateral resistor is arranged in a first plane parallel to the surface of the substrate. A vertical reference resistor comprises a layer arranged in a second plane parallel to the surface of the substrate and deeper than the first plane. This layer is doped to promote current flow in the second plane. The vertical reference resistor further comprises a first trench and a second trench coupled between the layer and the surface of the substrate. The first and second trenches are arranged in a vertical direction orthogonal to the first and the second planes and are doped to impede current flow in the vertical direction. A cross-section of the first and second trenches is two-fold rotationally symmetric around the vertical direction, and the lateral resistor and the first and second trenches have the same temperature coefficient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.