Method of fabrication of an integrated spiral inductor having low substrate loss

US11581398B2 · kind B2 · utility

Assignee

• LFOUNDRY S.R.L. · IT

Inventors

• Carsten Schmidt · Jena, DE
• Gerhard Spitzlsperger · Avezzano, IT

Key dates

• Filing date: Sep 6, 2019
• Grant date: Feb 14, 2023
• Expiry date: Oct 24, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/19042
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

After finishing of the front side CMOS manufacturing process, the silicon wafer is permanently bonded with its front side onto a carrier wafer. The carrier wafer is a high resistivity silicon wafer or a wafer of a dielectric or of a ceramic material. The silicon substrate of the device wafer is thinned from the back side such that the remaining silicon thickness is only a few micrometers. In the area dedicated to a spiral inductor, the substrate material is entirely removed by a masked etching process and the resulting gap is filled with a dielectric material. A spiral inductor coil is formed on the backside of the wafer on top of the dielectric material. The inductor coil is connected to the CMOS circuits on the front side by through-silicon vias.