Small pitch super junction MOSFET structure and method
US11581432B2 · kind B2 · utility
0Cited by
3References
15Claims
0Family size
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Inventor
Key dates
| Filing date | Jul 5, 2021 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Aug 11, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/256
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides semiconductor devices with super junction drift regions that are capable of blocking voltage. A super junction drift region is an epitaxial semiconductor layer located between a top electrode and a bottom electrode of the semiconductor device. The super junction drift region includes a plurality of pillars having P type conductivity, formed in the super junction drift region, which are surrounded by an N type material of the super junction drift region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.