Integrated circuit having a differential transmitter circuit
US11581875B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2021 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Oct 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In an integrated circuit, a first current source is coupled between a first supply voltage and a first node. An output stage includes a first current steering PMOS transistor coupled to the first node, a first current steering NMOS transistor including a first current electrode coupled to the first current steering PMOS transistor at a second node, a second current steering PMOS coupled to the first node, and a second current steering NMOS transistor including a first current electrode coupled to the second current steering PMOS transistor at a third node. Voltage at the second node is used to drive a gate of the second current steering PMOS transistor, and voltage at the third node is used to drive a gate of the first current steering PMOS transistor. First and second programmable slew rate pre-drivers provide outputs to the gates of the first and second current steering NMOS transistors, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.