Circuit for a bus system and method for operating a circuit
US11585834B2 · kind B2 · utility
1Cited by
2References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2019 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Aug 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/40215
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit for a bus system. The circuit includes: a measuring circuit, which is configured to measure a first resistance value between two bus-side terminals of the circuit; an ascertainment circuit, which is configured to ascertain a second resistance value as a function of the first resistance value; and a resistive circuit, which is configured to set a resistor connectable between the two bus-side terminals to the second resistance value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.