Neural network apparatus and method with bitwise operation
US11586886B2 · kind B2 · utility
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24Claims
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Key dates
| Filing date | Aug 16, 2019 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Nov 10, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/09
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor-implemented neural network processing method includes: obtaining a kernel bit-serial block corresponding to first data of a weight kernel of a layer in a neural network; generating a feature map bit-serial block based on second data of one or more input feature maps of the layer; and generating at least a portion of an output feature map by performing a convolution operation of the layer using a bitwise operation between the kernel bit-serial block and the feature map bit-serial block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.