Semiconductor device
US11587897B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2021 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Jan 7, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/186
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device comprising a semiconductor substrate, a conductive pad on a first surface of the semiconductor substrate, a passivation layer on the first surface of the semiconductor substrate, the passivation layer having a first opening that exposes the conductive pad, an organic dielectric layer on the passivation layer, the organic dielectric layer having a second opening, and a bump structure on the conductive pad and in the first and second openings. The organic dielectric layer includes a material different from a material of the passivation layer. The second opening is spatially connected to the first opening and exposes a portion of the passivation layer. The bump structure includes a pillar pattern in contact with the passivation layer and the organic dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.