Method of manufacturing semiconductor structure and semiconductor structure
US11587949B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 20, 2022 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | May 20, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
Abstract
A method of manufacturing a semiconductor structure and a semiconductor structure are provided. The method includes: providing a semiconductor substrate, and forming a first bit line; forming a support layer on the semiconductor substrate, the support layer including a first oxide layer, a first sacrificial layer, a second oxide layer, a second sacrificial layer, a third oxide layer, a third sacrificial layer and a fourth oxide layer that are stacked; forming, at a position corresponding to the first bit line, an active pillar penetrating through the support layer; removing each of the first sacrificial layer and the third sacrificial layer, and forming a first trench; removing a peripheral wall of the active pillar to form a first annular groove, a size of the first annular groove being greater than a size of the first trench in a vertical direction; forming a P-type filler in the first annular groove.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.