Analog to digital converter and a method for analog to digital conversion
US11588492B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2022 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Jul 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1009
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog to digital converter (ADC) receives first and second analog input signals. A charge sampling demultiplexer includes multiple capacitors that sample the first and second analog input signals, and generates multiple input samples representative of charge stored on the capacitors. A plurality of sub-ADCs each include first and second charge-to-time converters, which receive from the charge sampling demultiplexer respective first and second input sample of the first and second analog input signals and output respective first and second pulse-width-modulated (PWM) signals responsively to the respective first and second input samples. Temporal processing circuitry processes the PWM signals to generate a digital value indicative of a temporal difference between the first and second PWM signals. Output reordering circuitry receives the digital value from each of the sub-ADCs and generates a digital output indicative of a difference between the first and second analog input signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.