Interleaver for interleaving LDPC encoded bit sequence

US11588580B2 · kind B2 · utility

Assignee

• Fraunhofer-Gesellschaft zur förderung der angewandten Forschung e.V. · DE

Inventors

• Gerd Kilian · Erlangen, DE
• Sally Nafie · Erlangen, DE
• Jörg Robert · Uttenreuth, DE
• Jakob KNEIßL · Fürth, DE

Key dates

• Filing date: Jun 30, 2021
• Grant date: Feb 21, 2023
• Expiry date: Jun 30, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L1/0057
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

Embodiments provide an interleaver for interleaving an LDPC encoded bit sequence, wherein the interleaver includes a segmentation stage configured to segment the LDPC encoded bit sequence into a plurality of chunks including a first chunk and one or more other chunks, a first interleaver stage, configured to interleave the one or more other chunks or a concatenated version thereof, a second interleaver stage, configured to block wise interleave the first chunk and an interleaved bit sequence provided by the first interleaver stage, to obtain an interleaved version of the LDPC encoded bit sequence, wherein the first chunk consists of bits of a first type being, which are error correcting bits or repeat accumulate bits of the LDPC encoded bit sequence, or are represented, in a Tanner graph representation of the LDPC encoded bit sequence, by variable nodes that include non-random connections to at least two error correcting check nodes.