Transmitter-based, multi-phase clock distortion correction
US11588608B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2021 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Aug 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/765
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A device includes a transmitter to transmit serialized data within a differential direct-current (DC) signal over a differential output line, a multiplexer circuit coupled to the transmitter, and a calibration circuit coupled between the differential output line, a multi-phase clock, and the multiplexer circuit. The multiplexer circuit is to select the serialized data from ones of multiple input lines according to a multi-phase clock and pass the selected serialized data to the transmitter. The serialized data includes a calibration bit pattern. The calibration circuit is to capture and digitize the differential DC signal into a digital stream, measure an error value from the digital stream that is associated with distortion based on the calibration bit pattern, convert the error value into a gradient value, and correct one or more phases of the multi-phase clock to compensate for the distortion based on the gradient value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.