Print component with memory circuit
US11590752B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2019 |
| Grant date | Feb 28, 2023 |
| Priority date | — |
| Expiry date | Jul 31, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/105
- WIPO fieldTextile and paper machines
- WIPO sectorMechanical engineering
Abstract
A memory circuit for a print component including plurality of I/O pads, including a first analog pad and a second analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component, including an analog signal path connected to the first analog pad and the second analog pad, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the print component. The memory circuit further includes a memory component to store memory values associated with the print component, and a control circuit to, in response to a sequence of operating signals received by the I/O pads representing a memory read, provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.