Gate clock generator and display device
US11592859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2021 |
| Grant date | Feb 28, 2023 |
| Priority date | — |
| Expiry date | Mar 19, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/028
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate clock generator of a display device includes a carry clock generator configured to sequentially generate N carry clock signals based on a carry-on clock signal and a carry-off clock signal, a scan clock generator configured to generate N scan clock signals based on a scan-on clock signal and a scan-off clock signal, and a sensing clock generator configured to generate N sensing clock signals based on a sensing-on clock signal and a sensing-off clock signal. In a multi-clock mode of the display device, during an on period of a K-th carry clock signal, the scan clock generator outputs a K-th scan clock signal such that the K-th scan clock signal has a number of pulses that corresponds to a number of pulses of the scan-on clock signal in the on period of the K-th carry clock signal, and the sensing clock generator outputs a K-th sensing clock signal such that the K-th sensing clock signal has a number of pulses that corresponds to a number of pulses of the sensing-on clock signal in the on period of the K-th carry clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.