Display stack topologies for under-display optical transceivers
US11592873B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2020 |
| Grant date | Feb 28, 2023 |
| Priority date | — |
| Expiry date | Oct 28, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a display stack includes a set of light-emitting elements, and a display backplane that includes a set of conductors and is electrically coupled to the set of light-emitting elements. A conductor in the set of conductors has a length, and a curved edge extending along at least a portion of the length. In some embodiments, a display stack includes a set of light-emitting elements; a set of transistors, electrically coupled to the set of light-emitting elements; and a set of conductors, electrically coupled to the set of transistors. The set of transistors may be electrically coupled to the set of conductors at a set of conductive pads. A plurality of conductive pads in the set of conductive pads is coupled to a single conductor in the set of conductors. The single conductor approaches different conductive pads in the plurality of conductive pads at different angles.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.