Operating system assisted prioritized thread execution

US11593154B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ahmad Samih · Austin, US
• Rajshree Chabukswar · Sunnyvale, US
• Russell J. Fenger · Beaverton, US
• Shadi T. Khasawneh · Austin, US
• Vijay Dhanraj · Stuttgart, DE
• Muhammad Abozaed · Haifa, IL
• Mukund Ramakrishna · Austin, US
• Atsuo Kuwahara · Portland, US
• Guruprasad Settuvalli · Hillsboro, US
• Eugene Gorbatov · Hillsboro, US
• Monica Gupta · Santa Clara, US
• Christine Lin · San Francisco, US

Key dates

• Filing date: Dec 20, 2018
• Grant date: Feb 28, 2023
• Expiry date: Jan 1, 2039

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2209/5021
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

The present disclosure is directed to dynamically prioritizing, selecting or ordering a plurality threads for execution by processor circuitry based on a quality of service and/or class of service value/indicia assigned to the thread by an operating system executed by the processor circuitry. As threads are executed by processor circuitry, the operating system dynamically updates/associates respective class of service data with each of the plurality of threads. The current quality of service/class of service data assigned to the thread by the operating system is stored in a manufacturer specific register (MSR) associated with the respective thread. Selection circuitry polls the MSRs on a periodic, aperiodic, intermittent, continuous, or event-driven basis and determines an execution sequence based on the current class of service value associated with each of the plurality of threads.