Semiconductor device
US11594548B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2020 |
| Grant date | Feb 28, 2023 |
| Priority date | — |
| Expiry date | Sep 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76849
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a lower structure on the substrate, the lower structure including a first wiring structure, a second wiring structure, and a lower insulating structure covering the first and second wiring structures, a first pattern layer including a plate portion and a via portion, the plate portion being on the lower insulating structure and the via portion extending into the lower insulating structure from a lower portion of the plate portion and overlapping the first wiring structure, a graphene-like carbon material layer in contact with the via portion and the first wiring structure between the via portion and the first wiring structure, gate layers stacked in a vertical direction perpendicular to an upper surface of the substrate and spaced apart from each other on the first pattern layer, and a memory vertical structure penetrating through the gate layers in the vertical direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.