Solid-state imaging device and electronic apparatus
US11594567B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2018 |
| Grant date | Feb 28, 2023 |
| Priority date | — |
| Expiry date | Oct 23, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/08145
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A solid-state imaging device includes first through third substrates. The first substrate includes a first semiconductor substrate and a first multi-layered wiring layer stacked thereon. The second substrate includes a second semiconductor substrate and a second multi-layered wiring layer stacked thereon. The third substrate includes a third semiconductor substrate and a third multi-layered wiring layer stacked thereon. A coupling structure for electrically coupling at least two of the first through third substrates includes a via. The via exposes a predetermined wiring line in the second multi-layered wiring layer while exposing a portion of a predetermined wiring line in the first multi-layered wiring layer from a back surface side of the first substrate, or exposes a predetermined wiring line in the third multi-layered wiring layer while exposing a portion of the predetermined wiring line in the first multi-layered wiring layer or the second multi-layered wiring layer from the back surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.