Patent · US Active

Dual wafer plating fixture for a continuous plating line

US11598018B2 · kind B2 · utility

0Cited by
6References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 7, 2019
Grant dateMar 7, 2023
Priority date
Expiry dateFeb 5, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10F19/902
  • WIPO fieldSurface technology, coating
  • WIPO sectorChemistry

Abstract

A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.