Stacked memory device and operating method thereof
US11599458B2 · kind B2 · utility
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11References
20Claims
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Inventors
Key dates
| Filing date | Dec 15, 2021 |
| Grant date | Mar 7, 2023 |
| Priority date | — |
| Expiry date | Dec 15, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to some example embodiments of the inventive concepts, there is provided a method of operating a stacked memory device including a plurality of memory dies stacked in a vertical direction, the method including receiving a command and an address from a memory controller, determining a stack ID indicating a subset of the plurality of memory dies by decoding the address, and accessing at least two memory dies among the subset of memory dies corresponding to the stack ID such that the at least two memory dies are non-adjacent.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.