Asynchronous task execution for neural processor circuit
US11599780B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2020 |
| Grant date | Mar 7, 2023 |
| Priority date | — |
| Expiry date | Apr 14, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N20/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A neural processor circuit including one or more planar engine circuits that perform non-convolution operations in parallel with convolution operations performed by one or more neural engine circuits. The neural engine circuits perform the convolution operations on neural input data corresponding to one or more neural engine tasks to generate neural output data. The planar engine circuits perform non-convolution operations on planar input data corresponding to one or more planar engine tasks to generate planar output data. A data processor circuit in the neural processor circuit addresses data dependency between the one or more neural engine tasks and the one or more planar engine tasks by controlling reading of the neural output data as the planar input data by the planar engine circuits or reading of the planar output data as the neural input data by the neural engine circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.