Method of manufacturing semiconductor device
US11600495B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2020 |
| Grant date | Mar 7, 2023 |
| Priority date | — |
| Expiry date | Jun 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a method of manufacturing a semiconductor device. The method includes providing a substrate in which a main area including a first cell area and a first peripheral area, and an edge area including a second cell area and a second peripheral area are defined, sequentially forming a mold layer, a supporter layer, a mask layer, and a preliminary pattern layer on the substrate, exposing the preliminary pattern layer to light to simultaneously form a first pattern and a second pattern on the mask layer of the first cell area and the second cell area, respectively, forming an etch stop layer on the second pattern and etching the mask layer using the etch stop layer and the first pattern to form a hole pattern in the mold layer and the supporter layer of the first cell area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.