Three-dimensional semiconductor memory device and electronic system including the same
US11600609B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2021 |
| Grant date | Mar 7, 2023 |
| Priority date | — |
| Expiry date | May 18, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are three-dimensional semiconductor memory devices and electronic systems including the same. The three-dimensional semiconductor memory device comprises a first structure and a second structure in contact with the first structure. Each of the first and second structures includes a substrate, a peripheral circuit region on the substrate, and a cell array region including a stack structure on the peripheral circuit region, a plurality of vertical structures that penetrate the stack structure, and a common source region in contact with the vertical structures. The stack structure is between the peripheral circuit region and the common source region. The common source regions of the first and second structures are connected with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.