Radio frequency tripler systems and methods thereof
US11601090B1 · kind B1 · utility
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4References
14Claims
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Key dates
| Filing date | Aug 31, 2021 |
| Grant date | Mar 7, 2023 |
| Priority date | — |
| Expiry date | Aug 31, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/1072
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
This frequency tripler system uses a cascade of integrated transistor circuit differential limiting amplifiers and tunable notch filters that can directly serve one or more outputs, such as a direct clock or local oscillator drive. With this topology, filtering is distributed between two or more stages of differential limiting amplifiers and tunable notch filters. This enables suppression of smaller fundamental tone by the differential limiting amplifiers along with the tunable notch filters and yields a strong third harmonic signal to directly drive high performance mixers and digital-to-analog converters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.